DAQ PCI-FRM01 Uživatelský manuál stáhnout pdf (Strana 11)

PCI-FRM01 User’s Manual (Rev 1.1)

-11-

4.2 Description of the functional blocks

(1) FPGA

All of the board functions are controlled by the Logic program of the FPGA.

(2) LVDS

Receive Image frame through LVDS interface.

UART signal Receive/Transmit through LVDS interface.

Digital Output

(3) Regulator

This block is for supplying the power(3.3V) to the board.

(4) Level Shifter

It is protected a circuit that the voltage higher than 3.3V CMOS Logic is exchanged to normal 3.3V

Logic Level.

(5) EPLD

It makes correct timing interface for the FPGA.

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DAQ PCI-FRM01 Uživatelský manuál Strana 11